High speed buffers (or drivers) are used to transmit signals on a communication channel between and among integrated circuits (“ICs”). A signal to or from an IC is transmitted or received via a conductive interface material, typically referred to as a “PAD”, which provides a signaling interface and physical connection between the IC and the channel.
In some cases, use of such high speed buffers often results in poor signal integrity of the transmitted signal due to an impedance mismatch between the high speed buffer output impedance (“RO”) and the channel impedance (“ZO”). In other cases, poor signal integrity of a received signal often results from an impedance mismatch between the terminating or input impedance (“RT”) (present at the PAD or other interface) and the channel impedance ZO. Typically, impedance matching of a transmission line is provided not only at the transmitting end, but also at the receiving end, and is referred to as a double-ended termination.
As a transmitter and receiver may both be coupled at the same end of a transmission line or channel, such as for full duplex communication, it is desirable to provide for impedance matching to the channel impedance ZO both for the output impedance RO for signal transmission and for the input impedance RT for signal reception. Prior art attempts to provide such dual impedance matching have been mixed. Typically in the prior art, the output buffer provides a controlled output impedance which matches the channel impedance ZO. Matching the input impedance RT to the channel impedance ZO, however, is typically accomplished through the use of additional, fixed external resistors, separately inserted or coupled at the channel interface (PAD). Among other drawbacks, in addition to being non-integrated and requiring separate fabrication steps, such prior art impedance matching solutions also increase power consumption, as power is always being dissipated through the fixed resistors.